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  • Constraints on parallelism beyond 10 instructions per cycle

    Cleary, John G.; Littin, Richard H.; McWha, David J.A.; Pearson, Murray W. (Computer Science, University of Waikato, 1997-11)
    The problem of extracting Instruction Level Parallelism at levels of 10 instructions per clock and higher is considered. Two different architectures which use speculation on memory accesses to achieve this level of performance ...
  • Effects of re-ordered memory operations on parallelism

    Littin, Richard H.; Cleary, John G. (Computer Science, University of Waikato, 1997-11)
    The performance effect of permitting different memory operations to be re-ordered is examined. The available parallelism is computed using a machine code simulator. A range of possible restrictions on the re-ordering of ...

Richard H. Littin has 3 co-authors in Research Commons.