Browsing by Author "Legault, Jean-Philippe"

Now showing items 1-2 of 2

  • A comparison of verilog synthesis frontends

    Stokes, Daniel; Krylov, Georgiy; Legault, Jean-Philippe; Patros, Panos; Kent, Kenneth B. (The International Academy, Research and Industry Association (IARIA), 2021)
    A crucial consideration in choosing a frontend synthesis tool is the quality of the synthesised result. This kind of benchmarking is critical to choosing a fit-for-purpose tool. However, to the best of the authors’ knowledge, ...

  • Towards trainable synthesis for optimized circuit deployment on FPGA

    Legault, Jean-Philippe; Patros, Panos; Kent, Kenneth B. (IEEE, 2018)
    Field Programmable Gate Arrays (FPGAs) utilize multiple programmable elements and non-programmable blocks. After synthesizing an input Hardware Design Language (HDL) design into a circuit, optimizations are used to discover ...

Co-authors for Jean-Philippe Legault

Jean-Philippe Legault has 4 co-authors in Research Commons.