An exploration of using the intel AVX2 gather load instructions for vectorised image processing
Cree, M. J. (2018). An exploration of using the intel AVX2 gather load instructions for vectorised image processing. Presented at the International Conference on Image and Vision Computing New Zealand (IVCNZ), Auckland, New Zealand: IEEE. https://doi.org/10.1109/IVCNZ.2018.8634707
Permanent Research Commons link: https://hdl.handle.net/10289/12429
Processing image data with single-instruction multiple-data (SIMD) CPU instructions provides a means of vectorising, thus speeding up execution, of standard image processing operators. SIMD register loads normally load from consecutive locations in memory, that is, consecutive pixels in a row of the image. For some algorithms, however, data dependencies between pixels along rows render SIMD vectorisation useless. If one could efficiently load pixels from columns of images this problem would be fixed. The Intel AVX2 CPU extension introduces an instruction for the gather loading of data from multiple memory locations into a single CPU SIMD register. We explore using these instructions for column loads of image data in two common image operations, transposing images and mean filtering, to test 1) whether they provide useful speed-ups when other vectorised approaches exist (and find that they do not), and 2) whether they provide means of implementing operations that otherwise would be difficult or extremely inefficient to achieve without a column load (they can provide speed-ups over scalar code).
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