1997 Working Papers

Recent Submissions

Now showing 1 - 5 of 31
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    A graphical user interface for Boolean query specification
    (Working Paper, Computer Science, University of Waikato, 1997-12) Jones, Steve; McInnes, Shona
    On-line information repositories commonly provide keyword search facilities via textual query languages based on Boolean logic. However, there is evidence to suggest that the syntactical demands of such languages can lead to user errors and adversely affect the time that it takes users to form queries. Users also face difficulties because of the conflict in semantics between AND and OR when used in Boolean logic and English language. We suggest that graphical query languages, in particular Venn-like diagrams, can alleviate the problems that users experience when forming Boolean expressions with textual languages. We describe Vquery, a Venn-diagram based user interface to the New Zealand Digital Library (NZDL). The design of Vquery has been partly motivated by analysis of NZDL usage. We found that few queries contain more than three terms, use of the intersection operator dominates and that query refinement is common. A study of the utility of Venn diagrams for query specification indicates that with little or no training users can interpret and form Venn-like diagrams which accurately correspond to Boolean expressions. The utility of Vquery is considered and directions for future work are proposed.
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    Adaptive models of English text
    (Working Paper, Department of Computer Science, The University of Waikato, 1997-11) Teahan, W.J.; Cleary, John G.
    High quality models of English text with performance approaching that of humans is important for many applications including spelling correction, speech recognition, OCR, and encryption. A number of different statistical models of English are compared with each other and with previous estimates from human subjects. It is concluded that the best current models are word based with part of speech tags. Given sufficient training text, they are able to attain performance comparable to humans.
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    OZCHI‘96 Industry Session: Sixth Australian Conference on Human-Computer Interaction
    (Working Paper, Computer Science, University of Waikato, 1997-11) Phillips, Chris; McKauge, Janis
    The idea for a specific industry session at OZCHI was first mooted at the 1995 conference in Wollongong, during questions following a session of short papers which happened (serendipitously) to be presented by people from industry. An animated discussion took place, most of which was about how OZCHI could be made more relevant to people in industry, be it working as usability consultants, or working within organisations either as usability professionals or as ‘champions of the cause’. The discussion raised more questions than answers, about the format of such as session, about the challenges of attracting industry participation, and about the best way of publishing the results. Although no real solutions were arrived at, it was enough to place an industry session on the agenda for OZCHI‘96.
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    Effects of re-ordered memory operations on parallelism
    (Working Paper, Computer Science, University of Waikato, 1997-11) Littin, Richard H.; Cleary, John G.
    The performance effect of permitting different memory operations to be re-ordered is examined. The available parallelism is computed using a machine code simulator. A range of possible restrictions on the re-ordering of memory operations is considered: from the purely sequential case where no re-ordering is permitted; to the completely permissive one where memory operations may occur in any order so that the parallelism is restricted only by data dependencies. A general conclusion is drawn that to reliably obtain parallelism beyond 10 instructions per clock will require an ability to re-order all memory instructions. A brief description of a feasible architecture capable of this is given.
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    Constraints on parallelism beyond 10 instructions per cycle
    (Working Paper, Computer Science, University of Waikato, 1997-11) Cleary, John G.; Littin, Richard H.; McWha, David J.A.; Pearson, Murray W.
    The problem of extracting Instruction Level Parallelism at levels of 10 instructions per clock and higher is considered. Two different architectures which use speculation on memory accesses to achieve this level of performance are reviewed. It is pointed out that while this form of speculation gives high potential parallelism it is necessary to retain execution state so that incorrect speculation can be detected and subsequently squashed. Simulation results show that the space to store such state is a critical resource in obtaining good speedup. To make good use of the space it is essential that state be stored efficiently and that it be retired as soon as possible. A number of techniques for extracting the best usage from the available state storage are introduced.