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      •   Research Commons
      • University of Waikato Research
      • Computing and Mathematical Sciences
      • Computer Science Working Paper Series
      • 1997 Working Papers
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      •   Research Commons
      • University of Waikato Research
      • Computing and Mathematical Sciences
      • Computer Science Working Paper Series
      • 1997 Working Papers
      • View Item
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      Effects of re-ordered memory operations on parallelism

      Littin, Richard H.; Cleary, John G.
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      Littin, R.H. & Cleary, J.G. (1997). Effects of re-ordered memory operations on parallelism. (Working paper 97/28). Hamilton, New Zealand: University of Waikato, Department of Computer Science.
      Permanent Research Commons link: https://hdl.handle.net/10289/1124
      Abstract
      The performance effect of permitting different memory operations to be re-ordered is examined. The available parallelism is computed using a machine code simulator. A range of possible restrictions on the re-ordering of memory operations is considered: from the purely sequential case where no re-ordering is permitted; to the completely permissive one where memory operations may occur in any order so that the parallelism is restricted only by data dependencies. A general conclusion is drawn that to reliably obtain parallelism beyond 10 instructions per clock will require an ability to re-order all memory instructions. A brief description of a feasible architecture capable of this is given.
      Date
      1997-11
      Type
      Working Paper
      Series
      Computer Science Working Papers
      Report No.
      97/28
      Publisher
      Computer Science, University of Waikato
      Collections
      • 1997 Working Papers [31]
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